OCP RunBMC definition provides a standard connector definition that allows for separating the cadence of the platform being managed and the Management/Security Hardware (e.g. PRoT and BMC). The benefit of this approach allows for focusing security efforts on a single BMC card that can be used in a variety of platforms. Intel has a strong commitment to OpenBMC and is actively developing and contributing to OpenBMC. One of the key benefits that Intel sees in RunBMC is that in early platform development; the BMC silicon is often not ready for initial bring-up. By leveraging RunBMC, we are able to remove this dependency and risk. In addition to RunBMC providing customers choice in the BMC eco-system; it allows for innovation around new implementations of BMC and Security Hardware. To this end Intel has developed an FPGA Based RunBMC card leverage Intel® Cyclone V and Intel® MAX10 . This implementation runs an OpenBMC Firmware Stack. The benefits of using an FPGA based approach; allows for developing Robust RTL but also allows for more rapid innovation of new management and security features which are critical in improving the robustness of BMC and Security Technologies. By following OCP standards such as RunBMC and OpenBMC this design echoes the OCP mission and vision and provides an open; scalable and flexible platform that enhance possibilities for innovations around BMC in the FW and HW.
Johan is an expert in DataCenter Management across Cloud and Enterprise at all levels of the Management Stack covering both Software, Firmware and Silicon. His primary responsibilities at Intel is driving the architecture of Intel's @scale Telemetry and Debug Technologies.
Kasper is a Software Architect focused on manageability firmware solutions for servers. He's been working on the implementation and design of multiple generations of Intel SPS ME FW. His main area of expertise is related to embedded operating systems internals, performance/resource... Read More →
Qian is an engineer, who has worked in enterprise server BIOS, BMC and hardware design. Her current area of focus is datacenter, server platform manageability architecture and pathfinding.